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menu_book Engineering manual v1.0

How to use VIZO:A visual language for interacting with the board

VIZO is not a chatbot for generic conversations, but a graphical engineering tool. You interact with the system using colored arrows, measurement markers, and selection frames directly over the PCB photo or schematic diagram.

Quick start Colored arrows Helpful Features Calibration Signal Tracer Chip callouts Tips Controls
bolt Work process

Standard diagnostic workflow

1

1. Put a board or schematic on the bench

Click «+» at the bottom of the screen: take a camera shot, pick a photo from gallery, or attach a PDF schematic / Boardview file.

2

2. Place an arrow or a measurement

Point an arrow at a suspect chip or record voltage with a pin marker (for example, 19V, 0V).

3

3. Launch node analysis (->)

The system will extract the pinout from documentation, compute PWM startup conditions, and provide verified solutions.

VIZO Workbench
alt_route Tool semantics

Tool color coding

Every technician action on the canvas passes typed spatial vectors into the VIZO core. Below is the system response and UI result for each tool.

Blue arrow (Identification / Datasheet)
Technician action:

Used to identify components. Point the tip at a part — VIZO recognizes the laser marking, explains its circuit role, and attaches the factory pinout crop.

System processing:

SnapEngine resolves RefDes in Boardview. SkiaMacroCropper generates a high-res crop. The Librarian agent validates the MPN, queries distributor catalogs, downloads factory PDF, and extracts the pinout.

UI Output:

Interactive chip callout appears with [Pinout], [PDF], and [Analogs] badges. The card provides pin-by-pin functions and operating voltages.

Yellow arrow (Suspicion / In-circuit test)
Technician action:

Indicates a node under inspection. The system generates an in-circuit multimeter procedure without desoldering: diode-mode voltage drop (mV), resistance to GND, and control thresholds.

System processing:

AI Architect calculates node physics, power rails, pull-up/pull-down dividers, and forms a non-destructive test sequence without removing components.

UI Output:

Yellow bounding box on the PCB. The card details diode-mode drops (mV), resistance to GND (Ω), and expected enable signals.

Red arrow (Short circuit / Defect)
Technician action:

The component is verified failed. The system isolates the shorted rail, highlights the connected power bus, and identifies components at risk of cascade breakdown (high/low-side FETs, downstream loads).

System processing:

System skips re-inspection. It traces backward for root causes (VIN surges, gate driver runaway) and forward for downstream cascade damage.

UI Output:

Red box around defective component. Diagnostic card presents pre-soldering risk checklist (gate driver, high-side FET, load shorts).

Green arrow — Verified OK (Fact confirmation)
Technician action:

Mark a verified, properly operating circuit node.

System processing:

Node is committed to ProvenHealthyNodes facts. The model excludes it from further failure hypotheses and advances along the Power Sequence.

UI Output:

Green healthy badge. The diagnostic card proceeds to the next stage in the startup sequence.

Pin marker (Voltage reading / Manual input)
Technician action:

Placed on a test point or chip lead with a specified voltage (e.g. 19V, 0V). When 0V is recorded on a rail, the system provides a structured diagnostic checklist: controller start conditions (EN/VCC), load resistance to GND, and current sense circuits.

System processing:

Live OSNAP magnetically snaps reading to CAD pad. Reading is treated as Ground Truth. If 0V or anomalous voltage is detected, system calculates causes (open pull-up, protection trip, shorted load).

UI Output:

Orange badge with exact voltage right on the pin. Card provides circuit analysis explaining voltage drops and root causes.

crop Crop — Dense cluster / Schematic section focus
Technician action:

Select dense SMD clusters or intricate schematic areas using a rectangle.

System processing:

Client extracts full-resolution crop without downscaling entire board. SpatialFrameAggregator identifies all components inside bounding box and feeds them as a unified cluster.

UI Output:

AI analyzes multi-component interactions concurrently (e.g. full charger support circuitry) without losing optical line sharpness.

auto_awesome Useful features

Key interface features

flip Cross-layer navigation via X-Ray

If a component is on the other side, it renders with a dashed purple outline and a [🔄 BOT] badge. Clicking this badge automatically flips the board and focuses the camera directly on that component on the reverse layer.

ads_click Clickable chips in instruction text

Every component mentioned in the diagnostic text (e.g. 🎯 PU401 or 🎯 PR302) is an interactive button. Clicking it instantly centers and zooms the workbench on that component.

pin Direct input with magnetic snap

When placing a Pin marker near a lead, VIZO pre-fills the designator (e.g. PU401.16: ). Leave the prefix, type 19V, and press Enter.

restart_alt Query cancellation without quota loss

If you press «Cancel» during analysis, submit an empty query by accident, or experience a network drop, the diagnostic count is automatically refunded.

travel_explore Interactive focus on forum solutions

In the forum precedents carousel, clicking a solution card (e.g. «Typical fault: shorted capacitor PC501») automatically highlights and focuses on that exact capacitor on your board.

description Header slot click to view PDF

When a schematic PDF is loaded, clicking the top bar slot [ 📄 schematic.pdf ] opens the full schematic in the built-in fullscreen viewer.

my_location Method for sub-millimeter calibration: «The 3-Pass Clockwise Rule»

Achieving 0.2 mm CAD alignment precision via smartphone camera

VIZO utilizes an 8-DOF Direct Linear Transformation (DLT Homography). Moving one control point recalculates perspective across the entire board. To align CAD pads with QFN 0.4–0.5 mm lead pitches, use the iterative 3-pass method:

Pass 1 Zoom: 1.0x
Rough board outline fit

At full view, align the 4 reticles with outer PCB corners or mounting screw holes (H1..H4).

Pass 2 Zoom: 3.0x–5.0x
Clockwise landmark lock

Zoom in and align reticles with pin 1 of corner ICs clockwise: TL → TR → BR → BL.

Pass 3 Zoom: Max (RMB)
Final fine adjustment

Final verification loop. Use Right Mouse Button (RMB) to instantly pull the nearest corner under your cursor without scrolling.

mouse RMB / Alt + LMB: Instant grab of nearest corner under cursor at high zoom.
rotate_90_degrees_cw 90° & Flip buttons: Rotate or mirror grid if board is upside down.
warning Red wireframe: Warns of self-intersecting or degenerate corner coordinates.
conversion_path Signal and power rail tracing (Signal Tracer)

Signal and power rail tracing (Signal Tracer)

...into directed signal paths with animated current particles...

arrow_forward 1. Directed Flow

Traces originate from physical sources (connector JDCIN, IC output) through 2-pin passives (PL402.1 → PL402.2) to loads. Glowing neon particles indicate current direction at 60 FPS.

layers 2. Layer-Hopping Via Jump

When a signal dives into internal layers, the line does not break. The engine locates the nearest via (VIA), renders a pulsing purple ring, and casts an X-ray dashed ray to the reverse side component.

account_tree 3. Power & Gate-Drive Separation

Main power rails (19V / 3.3V) display in cyan, while PWM controller gate-drive signals display in separate green rays. You immediately see where gate switching pulses originate.

Signal trace color coding:

Cyan (Cyan) Main power rail, USB D+, TX
Green (Green) Gate Drive, Enable, Power Good
Purple (Purple) Secondary rails, USB D-, RX, audio right
Yellow (Yellow) Clock (CLK), Feedback (FB)
layers Interactive interface

Component callout elements

psychology Documentation on demand mode (On-Demand Context)

...The factory PDF becomes a primary engineering reference, matching your readings...

🧠
Chip name (Attach to context):

Clicking the chip name enables sending its complete pin table into the context of the next diagnostic prompt.

📄
Button [ PDF ] (Factory documentation):

Opens the complete official manufacturer PDF datasheet inside the integrated viewer.

📌
Button [ Pinout ] (Package drawing):

Expands a high-resolution package drawing with pin numbering and assignments (QFN, SOIC, SOT, TO-220).

🔄
Button [ Analogs ] (Interchangeability):

List of 100% compatible pin-to-pin cross-reference replacements from other manufacturers when the original part is out of stock.

Pinout drawing
tips_and_updates Best practices

VIZO Engineering Guidelines

1

Worn-off chip marking

If the package is charred or coated in resin, select the Pin tool, click the package body, and type the probable part number (e.g. TPS51125). The system will fetch documentation based on your text.

2

Dense schematics and crossings

If the drawing has a dense mesh of lines, isolate the node with the Crop tool. An enlarged fragment will be passed to the model, preventing line blurring.

3

Follow-up questions in the input bar

Do not reset the board for a follow-up question. Type below: «Why is pin 3 only 0.4V instead of 1.8V?» — VIZO will compute the voltage divider in front of that pin.

keyboard Navigation and gestures

Controlling the workbench on PC and mobile

mouse Computer and mouse
  • Mouse wheel Smooth zoom around the cursor
  • Hold LMB (Hand tool) Pan the board across the workbench
  • Double-click Reset zoom to 1:1
  • Escape Clear selection frame (Crop)
  • Enter Submit measurement for analysis
touch_app Smartphone and tablet
  • Two-finger pinch Pinch-to-zoom
  • Single-finger swipe Pan the board in Hand mode
  • Double-tap Reset zoom
  • Swipe card left/right Navigate hypotheses and solutions
  • Swipe PDF window down Quickly close datasheet
developer_board

Testing on real boards

Open the workbench, load a board, and evaluate datasheet extraction and circuit analysis in real conditions.

Go to the workbench arrow_forward